UNDERSTANDING OUTPUT CONDUCTANCE: WHY JFET DRAIN CURRENT IS NOT PERFECTLY CONSTANT
A JFET is often described as a voltage-controlled current source.
That description is useful—but it is not perfect.
Once a JFET is operating beyond the knee of its output characteristic, drain current becomes much less sensitive to drain-to-source voltage. However, the current does not become completely independent of VDS. The output curves retain a finite slope.
That slope is described by output conductance, commonly written as gos.
Understanding gos helps engineers predict voltage gain, current-source accuracy, bias stability and how closely a real circuit will follow an idealized model.
WHAT “SATURATION” REALLY MEANS
As VDS increases from zero, a JFET initially behaves more like a voltage-controlled resistance. Drain current changes substantially with drain-to-source voltage.
As VDS rises further, the channel becomes pinched near the drain and the device enters its saturation, or constant-current, region. In this region, VGS becomes the primary control over drain current.
But “constant current” is an approximation.
Increasing VDS can extend the depleted region near the drain and shorten the effective conducting channel. Drain current therefore continues to rise slightly even when VGS is held constant. This behavior is commonly associated with channel-length modulation.
The flatter the output curve, the closer the JFET behaves to an ideal current source.
WHAT IS OUTPUT CONDUCTANCE?
Output conductance describes the small change in drain current caused by a small change in drain-to-source voltage while gate-to-source voltage is held constant:
gos = ΔID / ΔVDS, with VGS held constant
Because conductance is the reciprocal of resistance, gos is measured in siemens. JFET datasheets commonly show it in microsiemens.
A smaller gos means a flatter drain-current curve and a higher small-signal output resistance.
The corresponding output resistance is approximately:
ro ≈ 1 / gos
For example, an output conductance of 50 µS corresponds to a small-signal output resistance of approximately 20 kΩ at that operating point.
This is a local, small-signal relationship—not a fixed resistance that applies under every voltage and current condition.
DO NOT CONFUSE gos WITH gfs
Both parameters are conductances, but they describe different relationships.
Forward transconductance, gfs:
Describes how drain current changes when VGS changes
Is evaluated with VDS held constant
Represents control from the input to the output
Output conductance, gos:
Describes how drain current changes when VDS changes
Is evaluated with VGS held constant
Represents the non-ideal dependence of output current on output voltage
High gfs can help produce gain. Low gos helps preserve that gain by providing a higher output resistance.
The two should be evaluated together.
WHY OUTPUT CONDUCTANCE AFFECTS VOLTAGE GAIN
In a simplified common-source amplifier, voltage gain is often introduced as:
Av ≈ −gfs × RD
That approximation assumes the JFET itself has infinite output resistance.
A real JFET contributes a finite ro, which appears in parallel with the drain resistor and the external load. A more useful small-signal approximation is:
Av ≈ −gfs × (RD || RL || ro)
If ro is not much larger than the external resistances, the available voltage gain is reduced.
The ratio:
gfs / gos = gfs × ro
represents the device’s approximate intrinsic voltage gain at the selected operating point. It shows why transconductance alone does not determine amplifier gain.
WHY OUTPUT CONDUCTANCE AFFECTS CURRENT SOURCES
A JFET biased as a current source is expected to hold current relatively steady while the voltage across it changes.
Finite output conductance means that some current variation remains:
ΔID ≈ gos × ΔVDS
As an illustrative example, if gos = 50 µS and VDS changes by 5 V, the resulting small-signal current change is approximately:
ΔID ≈ 50 µS × 5 V = 250 µA
This example illustrates the relationship only. Actual behavior must be determined at the device’s intended drain current, drain-to-source voltage and temperature.
Finite gos can matter in:
Bias-current sources
Differential-amplifier tail currents
Active loads
Current mirrors
High-gain common-source stages
Sensor excitation circuits
Current-limiting networks
OUTPUT CONDUCTANCE DEPENDS ON THE OPERATING POINT
gos is not one universal number for a device.
It can change with:
Drain current
Drain-to-source voltage
Gate-to-source voltage
Temperature
Device grade
Normal production variation
This is why a datasheet may provide curves of gos versus VDS at several drain-current levels instead of presenting one value that applies everywhere.
The current LSK389 datasheet, for example, includes separate output-conductance curves for its A, B, C and D IDSS grades across different operating currents and drain-to-source voltages.
Engineers should read the curve at—or as close as possible to—the intended Q-point.
HOW TO READ THE OUTPUT CURVES
Start with the drain-current-versus-drain-to-source-voltage curves.
For a selected VGS, observe how steeply ID changes as VDS changes:
A steep curve indicates greater output conductance and lower output resistance.
A flatter curve indicates lower output conductance and higher output resistance.
Then review any dedicated gos curves at the intended drain current and VDS.
Do not assume the curve is perfectly horizontal simply because the JFET is operating in saturation. Also verify that the device has sufficient VDS to remain beyond the knee throughout the full signal swing.
REDUCING THE EFFECT OF FINITE OUTPUT CONDUCTANCE
Several circuit techniques can reduce the effect of drain-voltage variation.
HOLD VDS MORE CONSTANT
A cascode can reduce voltage movement at the amplifying JFET’s drain. Keeping VDS relatively constant reduces current modulation caused by finite output conductance and can also reduce the Miller effect.
USE SOURCE DEGENERATION
A source resistor introduces local negative feedback. It can improve bias stability and linearity, although it may reduce stage gain and can add thermal noise when it is not bypassed.
PROVIDE SUFFICIENT VOLTAGE HEADROOM
The JFET must remain in the intended operating region throughout the signal swing. Insufficient headroom can move the device toward the knee, where drain current becomes much more dependent on VDS.
USE FEEDBACK AT THE CIRCUIT LEVEL
Feedback can reduce sensitivity to device variation, but only if the complete circuit has sufficient loop gain, stability and bandwidth.
SIMULATE—AND THEN VERIFY
A suitable SPICE model can help estimate output resistance, gain and current variation. The result should still be checked against datasheet curves and, when performance is critical, measured in the actual circuit.
WHAT ENGINEERS SHOULD CHECK
When output conductance may affect a design, ask:
What are the intended ID, VDS and VGS?
Does the JFET remain beyond the knee over the entire signal and supply range?
What does the datasheet show for gos near that operating point?
What output resistance does that imply?
Is ro large compared with the drain resistor and external load?
How much current change will result from the expected VDS variation?
Will finite ro reduce voltage gain or common-mode performance?
Would a cascode, source degeneration or circuit-level feedback improve the result?
Does the simulation model reproduce the relevant datasheet curves?
Is production variation important enough to require prototype measurements or additional selection?
LINEAR SYSTEMS JFETS
Linear Systems offers single and monolithic dual JFETs for low-noise amplification, sensor interfaces, instrumentation, professional audio and other precision analog applications.
Devices such as the LSK170, LSK389, LSK489, LSJ74 and LSJ689 should be evaluated using their current datasheets and the operating conditions of the intended circuit.
For applications requiring accurate gain or current regulation, gos, output resistance and voltage headroom should be considered alongside IDSS, VGS(off), gfs, noise and capacitance.
ENGINEERING TAKEAWAY
A JFET can behave like a very good voltage-controlled current source—but never a perfect one.
Output conductance describes the drain current that still changes as VDS changes. Its reciprocal, output resistance, helps determine the voltage gain available from a common-source stage and the accuracy of a JFET current source.
The essential lesson is simple:
Do not evaluate transconductance without also considering output conductance.
One tells you how strongly the gate controls the current. The other tells you how much the drain voltage still does.
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