JFET Design Spotlight: A case for Paralleling JFETs for lower noise
What happens when you rethink low-noise amplifier design from a clean sheet? This design explores paralleling LSK389 JFETs to push noise even lower.
“Things happen while throwing out historical habits in favor of a clean piece of paper.
Differential Amplifiers, being relatively commonplace in analog circuit design, have traditionally followed familiar circuit practices regarding noise. For this discussion JFETs are of interest though Bipolar parts similarly apply. Front end noise is the algebraic sum between the first stage JFETs and if on a common Die like a dual, have some advantage of common mode noise reduction if they’re differentially sensed. Common mode noise on interleaved Dies like the LSK389 dual is significantly lower than individual matched Dies due to matched proximity doping uniformity. Another technique of front-end noise reduction is to parallel gain elements together where the noise is reduced by the root of the number of paralleled devices.
Noise= 1/√N × (single device noise) where N= number of devices in parallel. However, paralleling has its tradeoffs of higher IDS, increased Vgs and higher input capacitance, but, if high impedance and low noise is a goal, that’s it. Effectively, bigger Dies = lower noise along with the tendency of noise being inversely proportional to device Gm. Proposed here is a rather pedantic implementation of a combined function, reduced noise, amplifier. It uses paralleled input JFETs as well as cross coupling of these parts to the Gm buffers in an effort to reduce the common mode noise influence for differential sensing. This implementation uses, as usual, the front end as a Gm stage to feed into a differential transimpedance amp. Not as usual, a pair of bipolar current steered Gm amps, between, are cross coupled to drains of JFET pairs. The JFET pairs are mirrored side to side so that common mode noise from each side is split between the Gm amp pairs feeding the Differential final. So noise is reduced in the first order by 1/√N and then by common mode mixing of each side through the Gm buffers. Using the LSK389s, noise is <<1nV/√Hz @ 100Hz. Note that the input differential quad groups are symmetrically mirrored using dual JFETs, half on each side. Gain is then represented by the dual quads’ Gm and current mirrored into the final transimpedance amp. This configuration is designed for 25mVRMS AC input, Gain of 100. Gain and input voltage can be rearranged by input source degeneration and/or transimpedance resistor change. It may seem a bit complicated at first so go back and look at the block diagram to ease that feeling. Your thoughts here are always valuable so, have at it.
Fig 1) Block diagram of the concept
Fig 2) Full Blown mirrored interstage Gm amps
Fig 3) Trimmed down (simplified) Gm mirror stage
Fig 4) Boned out to a minimum W/O Gm crossover
Fig 5) The minimum minimum W/O Gm crossover
As Usual ...... Kirkwood Rough”
Kirkwood’s design illustrates how the LSK389 can be used beyond conventional differential amplifier configurations. By combining parallel devices with a symmetrical, cross-coupled architecture, it explores another path toward exceptionally low-noise performance.
Interested in designing with the LSK389? Explore the product specifications or contact Linear Systems to discuss your low-noise application.
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