BEYOND THE DATASHEET: HOW JFET NOISE IS MEASURED—AND WHY TESTING MATTERS
Updated: 2 hours ago
A JFET datasheet may list an impressively low voltage-noise number—but how was that number measured, at what frequency, and does it represent a typical value or a guaranteed maximum?
Those details matter.
At nanovolt-per-root-hertz levels, the measurement system, test conditions and specification method can significantly influence the result. Understanding what sits behind the published number helps engineers make more meaningful comparisons between devices.
WHAT DOES A JFET NOISE SPECIFICATION MEAN?
JFET voltage noise is commonly expressed as a noise-voltage density:
nV/√Hz
This value describes the noise generated by the device over a one-hertz bandwidth at a specified frequency and operating condition.
A lower number generally indicates that the device contributes less voltage noise to the signal chain. However, the number should never be evaluated by itself.
Engineers should also consider:
The frequency at which the measurement was taken
The device’s drain current and drain-to-source voltage
The source impedance presented to the gate, including its resistive and capacitive components
Whether the value is typical or guaranteed
The measurement bandwidth
The test circuit and fixture gain
Whether compliance is verified through characterization, sampling or individual-device testing
Without this context, two similar-looking noise specifications may not provide the same level of assurance.
WHY FREQUENCY MATTERS
JFET noise is not constant across all frequencies.
At lower frequencies, 1/f noise—also known as flicker noise—typically becomes more significant. At higher frequencies, the device generally reaches a flatter broadband-noise region.
This is why a single noise value at one frequency does not describe the device’s complete noise performance.
For example, measuring at multiple frequencies such as 10 Hz, 100 Hz, 1 kHz and 10 kHz provides a more useful view of how the device transitions from its low-frequency 1/f region into its broadband-noise region.
The frequency must therefore be included whenever noise performance is compared.
WHY SOURCE IMPEDANCE MATTERS
Source impedance is another essential condition when evaluating JFET noise.
When a JFET’s intrinsic voltage noise is measured, the gate is typically connected through a defined—and often very low—source impedance. This minimizes the voltage developed by input-current noise and helps isolate the device’s voltage-noise contribution.
In an actual circuit, however, total input-referred noise also includes the thermal noise of the source resistance and the voltage produced when the JFET’s input-current noise flows through the source impedance.
For a primarily resistive source, the total input-referred noise can be approximated as:
e_total = √[e_n² + (i_nR_s)² + 4kTR_s]
where:
e_n is the JFET’s input voltage-noise density
i_n is its input current-noise density
R_s is the source resistance
k is Boltzmann’s constant
T is absolute temperature
Source impedance may also include capacitance and can therefore change with frequency. This is especially important with piezoelectric sensors, photodiodes, microphones and other high-impedance or capacitive sources.
A voltage-noise number should therefore be interpreted together with its source impedance, bias conditions, frequency and measurement bandwidth.
TYPICAL VALUES VERSUS MAXIMUM LIMITS
One of the most important distinctions on a datasheet is whether a noise value is listed as typical or maximum.
A typical value represents expected or representative performance based on characterization data. It does not necessarily guarantee that every production device will meet that exact value.
A maximum specification establishes a defined upper limit under the stated test conditions. This provides a clearer design boundary for engineers who need predictable performance.
The distinction becomes especially important when comparing replacement devices. For example, a device with maximum noise limits should not be evaluated as though its specification were equivalent to a competitor’s typical value measured at only one frequency.
The headline numbers may appear similar, while the level of assurance behind them may be very different.
WHY LOW-NOISE MEASUREMENT IS DIFFICULT
Measuring JFET noise near the nanovolt-per-root-hertz level is not as simple as connecting the device to a spectrum analyzer.
The test setup can introduce noise and measurement errors of its own.
Important considerations include:
Shielding from electromagnetic interference
Grounding and cable placement
Noise from the power supplies
The voltage noise and current noise of the first amplifier stage
The source impedance and capacitance presented to the JFET gate
Fixture gain and analyzer sensitivity
Measurement bandwidth and FFT settings
The number of measurements averaged
Input capacitance and the Miller effect
The drain current used during testing
Sufficient settling time before the measurement begins
If these factors are not controlled, the test system may measure itself as much as it measures the JFET.
VERIFYING THE MEASUREMENT SYSTEM
Before testing a low-noise device, the measurement system must be checked against a known reference.
Linear Systems uses a noise-reference adapter to verify that the test fixture and analyzer produce the expected readings before device measurements are performed. The system is checked at multiple frequencies so that problems with the fixture, connections, gain or analyzer can be identified before production testing begins.
This step is critical. A test result is only credible if the measurement system has first demonstrated that it can accurately detect the expected noise level.
A known resistance may also be used as a calibration reference because its thermal-noise density can be calculated from:
e_n = √(4kTR)
where:
k is Boltzmann’s constant
T is absolute temperature
R is resistance
Comparing the calculated thermal-noise value with the measured result can help confirm the performance of the test chain.
SHIELDING, SETTLING AND AVERAGING
At these signal levels, ordinary environmental interference can overwhelm the device noise being measured.
A shielded fixture helps isolate the device under test from power-line interference, radio-frequency signals and other electrical activity in the surrounding environment.
The device must also be allowed to settle at the required voltage and current before its noise is measured. Taking a reading too early can produce a result that does not represent stable operation.
Averaging multiple measurements helps reduce random variation in the displayed spectrum. However, averaging cannot correct a poor grounding arrangement, insufficient shielding or an improperly configured front end. The physical test environment remains essential.
THE IMPORTANCE OF THE OPERATING POINT
JFET noise performance depends partly on the device’s operating point.
Drain current affects transconductance, voltage noise and other device characteristics. A noise specification is therefore meaningful only when the corresponding bias conditions are provided.
IDSS selection can also influence how consistently devices operate within a circuit.
A tighter IDSS range may simplify biasing and reduce unit-to-unit variation. A wider range may provide a more economical device option but require the circuit to accommodate greater variation.
Additional electrical selections can provide tighter performance when an application requires it, but they also add testing, handling and production cost.
DIFFERENT LEVELS OF NOISE ASSURANCE
Not every JFET is tested in the same way, and not every Linear Systems JFET is 100% noise tested.
Depending on the product and its specifications, noise performance may be supported through:
Device characterization
Guaranteed datasheet limits
Production-lot sampling
Individual-device testing
Additional customer-requested selections
Selected Linear Systems JFETs are individually tested for voltage noise when required by the product specification and production process.
For example, the LSK389 and the LSK170C in the SOT-23 package receive 100% voltage-noise testing. Other products may use different testing or selection strategies based on their specifications, applications and market requirements.
Individual testing offers a higher level of verification, but it also requires specialized equipment, additional production time and careful handling. It may therefore be applied selectively where the device specification and intended use justify it.
WHAT ENGINEERS SHOULD LOOK FOR
When comparing low-noise JFETs, engineers should ask:
Is the noise value typical or guaranteed?
At what frequency was it measured?
What were the drain current and drain-to-source voltage?
What source impedance was presented to the gate, and does it represent the intended application?
Does the datasheet show low-frequency and broadband performance?
Is the specification based on characterization, sampling or individual testing?
What bandwidth and test method were used?
Does the circuit require a particular IDSS range or additional selection?
Are input capacitance, transconductance and noise being evaluated together?
The device with the lowest headline number is not automatically the best choice. The most appropriate device is the one whose complete electrical characteristics, test conditions and level of assurance fit the application.
LINEAR SYSTEMS LOW-NOISE JFETS
Linear Systems offers a range of low-noise JFETs for sensor interfaces, instrumentation, professional audio, test and measurement equipment, medical electronics and other precision applications.
The product family includes:
LSK170 single N-channel JFET
LSK389 monolithic dual N-channel JFET
LSK489 lower-capacitance monolithic dual N-channel JFET
LSJ74 single P-channel JFET
LSJ689 monolithic dual P-channel JFET
LSBF862 N-channel JFET and BF862 replacement
Each device should be evaluated using its current datasheet, complete test conditions and applicable production-testing requirements.
ENGINEERING TAKEAWAY
A low-noise specification is only as meaningful as the conditions and verification behind it.
Engineers should look beyond the headline nV/√Hz number and consider:
Frequency
Bias conditions
Source impedance and source capacitance
Bandwidth
Typical versus maximum limits
Measurement methodology
Production-testing coverage
Understanding these details leads to better device comparisons, more predictable circuit performance and fewer surprises in low-noise signal-chain design.
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